Ericsson is launching a range of Massive MIMO and RAN Compute solutions to help accelerate 5G mid-band rollouts.
Three new radios are being added to Ericsson’s Massive MIMO portfolio in addition to six RAN Compute products.
Per Narvinger, Head of Product Area Networks at Ericsson, says:
“After the first rollouts of 5G networks, now is the time to scale up 5G by leveraging Massive MIMO to a much larger extent.
With our new portfolio, communications service providers can speed up their mid-band deployments efficiently with superior performance for their users, while reducing energy consumption.”
Starting with the new Massive MIMO radios, each weighs just 20kg – up to 45 percent lighter than the previous generation – and are 20 percent more energy-efficient. The devices also feature passive cooling to help limit the need for costly maintenance visits.
The lighter weight and reduced need for maintenance provide more flexibility to install the radios from urban high-rise buildings to suburban and rural capacity areas for use cases including Fixed Wireless Access, automotive, transport, and logistics.
Ed Gubbins, Principal Analyst at GlobalData, comments:
“This portfolio launch comes at an opportune moment as carriers turn their attention to capitalising on mid-band 5G spectrum.
Ericsson’s Massive MIMO radios are an industry standout in terms of compact form factors and lightweight designs, which should help operators overcome deployment challenges.
In addition, the stability and strength of Ericsson’s custom silicon strategy also sets them apart.”
Ericsson’s six new RAN Compute products include both outdoor and indoor options to support mid-band 5G rollouts and 4G expansions. The new RAN Compute products deliver up to 50 percent higher throughput and 15 to 20 percent lower energy consumption.
All of the new products are powered by Ericsson Silicon.
For the Massive MIMO radios, Ericsson says the architecture design of its chips provides real-time channel estimation and ultra-precise beamforming. Software and sensitive data are protected through enhanced security achieved through “tight co-design” of the silicon and architecture.
